Anti-Tamper Digital Clocks - An Overview



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Resettable hold off line segments among a resettable hold off line segment 210-1 affiliated with a minimal hold off time as well as a resettable delay line section 210-N associated with a most delay time are Every connected with discretely escalating hold off occasions. The Examine circuit 240 is activated by the clock CLK and uses the plurality of delayed monotone alerts to detect a clock fault.

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19. The equipment for detecting clock tampering as outlined in declare 18, wherein the drinking water degree range is decided based upon delayed monotone alerts from one or more previous clock Appraise time.

a primary plurality of resettable delay more info line segments that each hold off the first monotone signal to crank out a respective initially plurality of delayed monotone signals, whereby resettable delay line segments concerning a resettable hold off line section connected to a minimum amount hold off time along with a resettable hold off line phase connected with a optimum delay time are Every linked to discretely rising delay times;

A monotone sign is supplied during a clock Assess time frame connected with a clock. The monotone signal is delayed utilizing Every on the plurality of resettable delay line segments to deliver a respective plurality of delayed monotone indicators. The clock is used to trigger an Consider circuit that uses the plurality of delayed monotone signals to detect a clock fault.

31. The equipment for detecting voltage tampering as described in claim thirty, further comprising: implies for resetting the means for delaying the monotone signal through a reset time period, wherein the reset time frame is just before the Appraise time frame.

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